1. Field of the Invention
The present invention generally relates to semiconductor devices, and more particularly to a fabrication process of a high power semiconductor device having the PHS (plated heat sink) structure. Further, the present invention relates to a semiconductor device fabricated according to such a fabrication process.
2. Description of the Related Art
In high power semiconductor devices, it is necessary to dissipate heat as efficiently as possible. For this purpose, such high power semiconductor devices use a semiconductor substrate having a thickness reduced as much as possible, in combination with the so-called PHS (plated heat sink) structure in which a metal layer is provided on the rear side of the substrate as a heat sink. Such a PHS structure is also useful in high speed semiconductor devices such as GaAs FET or HEMT for minimizing the length of the ground conductor pattern. In such semiconductor devices, through-holes are formed in a substrate of the device in correspondence to the source region, and the source electrode is connected to a grounded metal layer provided on the rear side of the substrate via the through-holes. Thereby, the problem of reduced gain, caused by the inductance of the conductor pattern that connects the source electrode to the ground, is successfully eliminated.
When fabricating a semiconductor device having the PHS structure, semiconductor chip patterns are formed on a surface of a semiconductor substrate that has an ordinary thickness. Next, the substrate is turned over and fixed upon a slab such as a glass substrate by means of wax, such that the front surface of the substrate faces the glass substrate. In this state, the rear side of the semiconductor substrate is ground uniformly by means of a back-grinder tool and diamond abrasives. Further, a chemical etching process is applied to reduce the thickness of the substrate to a thickness less than 50 xcexcm. After such a process, a resist pattern is provided on the rear side of the semiconductor substrate in correspondence to an electrode pattern on the front side of the substrate, and a plating is conducted on the rear side of the substrate while using the resist pattern as a mask to form an electrode pattern on the rear side of the substrate. After the individual semiconductor devices are formed as such, the substrate is divided into respective chips by conducting a dicing process. Typically, the substrate is cut by means of a dicing saw or etched along a dicing line defined on the surface of the substrate.
When fabricating a semiconductor device having a through-hole in the substrate, the substrate upon which the semiconductor devices are formed is mounted upon a slab or support substrate similarly as before, and the resist pattern is formed on the rear side of the semiconductor substrate so as to expose the region in which the through-hole is to be formed. Further, the resist pattern is formed to expose the foregoing dicing line. By conducting an etching process, the semiconductor substrate is divided into semiconductor chips separated from each other, and the through hole is formed in each of the semiconductor chips at the same time. When the etching is completed, the semiconductor chips are held upon the foregoing glass substrate by a wax, and an electrode is formed on the exposed rear side of the substrate by a plating process so as to fill the through-hole, while simultaneously protecting the dicing region by a resist pattern. The electrode thus formed also acts a heat sink. After the formation of the rear electrode, individual semiconductor chips are separated from the glass substrate by dissolving the wax by a suitable solvent.
In the foregoing fabrication process, it should be noted that the completed semiconductor chips are in alignment on the glass substrate as long as the chips are fixed thereupon by means of wax. On the other hand, once the wax is dissolved, the alignment of the chips is lost and the semiconductor chips are intermixed. Thereby, the use of an automatic assembling process, such as the one that uses an automatic chip-bonder apparatus, makes it difficult for constructing the semiconductor device in the form of semiconductor package.
In the foregoing processes, it should be noted that the front surface of the substrate is contacted with the glass substrate in a state in which the chips are aligned on the glass substrate, and it is the rear side of the chip, which carries the foregoing heat sink electrode, that is exposed for accessing from the outside. As a result, picking up of the semiconductor chips and assembling the same into a semiconductor package inevitably becomes a complex process, and because of this, there has been a difficulty in the mass production of the semiconductor device having the PHS structure.
Accordingly, it is a general object of the present invention to provide a novel and useful fabrication process of a semiconductor device and a semiconductor device fabricated according to such a process wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a fabrication process of a semiconductor device having a PHS structure including a step of mounting a semiconductor substrate, on which a plurality of semiconductor chips are formed, on a support substrate, wherein the alignment of the semiconductor chips is maintained even when the semiconductor chips are separated from each other and detached from the support substrate.
Another object of the present invention is to provide a process for fabricating a semiconductor device, comprising the steps of:
(a) forming a plurality of semiconductor devices on a semiconductor substrate, such that the semiconductor devices are separated from each other by a dicing region;
(b) forming a connection part on the dicing region such that said connection part mechanically connects said semiconductor devices with each other;
(c) separating said plurality of semiconductor devices from each other except for said connection part, by removing the dicing region selectively; and
(d) separating the plurality of semiconductor devices from each other by eliminating a mechanical connection formed by said connection part.
Another object of the present invention is to provide a semiconductor device, comprising:
a semiconductor chip defined by lateral edges; and
a fragment of a connection part provided at least on one of said lateral edges for maintaining an alignment with another semiconductor chip, the connection part having a width smaller than a size of the lateral edge on which the connection part is provided and is provided for mechanically connecting adjacent semiconductor chips with each other.
According to the present invention, the semiconductor devices are connected with each other mechanically by means of the connection part, even in the state in which the separation region is removed. Thus, the alignment of the semiconductor devices is maintained even after the step for separating the semiconductor devices from the support substrate, and it becomes possible to apply an automatic assembling process for assembling a semiconductor package that uses a PHS semiconductor chip. Further, the present invention is not only effective in such an automatic assembling process but also in the manual assembling process in which the semiconductor chips are picked up manually. Because of the alignment of the semiconductor chips, the work load of the worker for picking up the semiconductor chip manually is substantially reduced.
According to the preferred embodiment of the present invention, the step (c) includes a step of bonding the semiconductor substrate a support substrate by means of a bonding medium such that each of the semiconductor devices on the semiconductor substrate has a surface thereof engaged upon a surface of the support substrate. The step of removing the dicing region is conducted, in the step (c), in a state that the semiconductor devices are bonded upon the support substrate. Thereby, it is possible to remove the dicing region and separate the semiconductor devices into respective chips while maintaining the alignment between the semiconductor devices. Further, such a step for removing the dicing region may be conducted simultaneously with the process for forming a via hole through the semiconductor devices. Thus, the process of the present invention is suitable for fabricating the semiconductor devices having the so-called PHS structure.
According to another preferred embodiment of the present invention, the step (d) comprises the sub-steps of: detaching the semiconductor devices from the support substrate by removing the bonding medium while maintaining the state in which the semiconductor devices are connected with each other mechanically by the connection part; bonding a rear side of the semiconductor devices, after being detached from the support substrate, upon a sticky medium; and disconnecting the connection part. According to the present invention, the semiconductor chips are held on the sticky medium while maintaining mutual alignment after the connection part is broken.
According to another preferred embodiment of the present invention, the step (b) comprises the sub-steps of: depositing a protective layer upon the semiconductor substrate such that the protective layer covers each of the semiconductor devices including the separation region; and patterning the protective layer to form a connection part such that the connection part connects the semiconductor devices with each other. According to the present invention, one can form the connection part as a part of the protective layer or passivation film and no extraneous deposition process is required to form the connection part.
According to another preferred embodiment of the present invention, the step of patterning the protective layer is conducted to form a device surface region that is a part of the protective layer covering the principal surface of the semiconductor device, such that the connection part is isolated from the device surface region. According to the present invention, the stress applied to the connection part for causing a fracture therein does not propagate to the chip surface region, and the protective layer covering the chip surface is kept free from damage.
According to another preferred embodiment of the present invention, the step (b) comprises a sub-step (b-1) of depositing a layer having a composition different from the semiconductor substrate, upon the semiconductor substrate, such that the layer covers continuously those regions of the substrate in which the semiconductor devices are formed and those regions in which the isolation region is formed, and wherein the step (a) includes a step of forming an active part on the layer formed by the step (b-1). According to the present invention, one can form the connection part as a part of the semiconductor layer such as a buffer layer that forms the semiconductor device. Thereby, it is possible to reduce the number of steps for forming the connection part.
According to another preferred embodiment of the present invention, the step (d) includes a step for deforming the sticky medium to break the connection part. According to the present invention, the separation of the semiconductor chips is achieved easily by merely expanding or deforming the sticky medium or sheet.
According to another preferred embodiment of the present invention, the step (d) includes a step for etching the connection part away. According to he present invention, it is possible to take up the semiconductor chips that are separated from each other as a result of etching of the connection part, from the support substrate to a suitable medium such as a sticky tape. Thereby, it is possible to eliminate the process to apply stress for breaking the connection part, and the risk that the semiconductor chip is damaged as a result of the mechanical breaking of the connection part is substantially reduced.
According to another preferred embodiment of the present invention, the step of etching is conducted while using a metal layer covering a rear principal surface of the semiconductor devices as a mask. Thereby, one can eliminate the masking process for masking the substrate by photoresist.
According to another preferred embodiment of the present invention, the sticky medium is a sheet that is laterally expandable, and wherein the step of deforming the sticky medium comprises the steps of: expanding the sheet to increase a distance between adjacent semiconductor devices to break the connection part; and picking up the semiconductor chips. According to the present invention, it is possible to separate the individual semiconductor chips easily.
Other objects and further features of the present invention will become apparent from the following detailed description when read in conjunction with the attached drawings.